STP3052D p channel enhancement mode mosfet 25.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2009, stanson corp. STP3052D 2009. v1 description STP3052D is the pchannel logic enhancement mode po wer field effect transistor which is produced using high cell density, dmos tre nch technology. this high density process is especially tailored to minimize onstate resistance. these devices are particularly suited for low voltage app lication. such as dc/dc converter and desktop computer power management. the package is universally preferred for commercial industrial surface mount applications. pin configuration (d-pak) to-252 to-251 part marking y: year code a: process code feature 30v/25.0a, r ds(on) = 45m (typ.) @v gs = 10v 30v/16.0a, r ds(on) = 78m @v gs =5.0v super high density cell design for extremely low r ds(on) exceptional onresistance and maximum dc current capability to252,to251 package design
STP3052D p channel enhancement mode mosfet 25.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2009, stanson corp. STP3052D 2009. v1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drainsource voltage vdss 30 v gatesource voltage vgss 20 v continuous drain current (tj=150 ) ta=25 ta=70 id 25.0 18.0 a pulsed drain current idm 100 a continuous source current (diode conduction) is 15 a power dissipation ta=25 ta=70 pd 40 20 w operation junction temperature tj 150 storgae temperature range tstg 55/150 thermal resistancejunction to ambient rja 105 /w
STP3052D p channel enhancement mode mosfet 25.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2009, stanson corp. STP3052D 2009. v1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max uni t static drainsource breakdown voltage v (br)dss v gs =0v,id=250ua 30 v gate threshold voltage v gs(th) v ds =v gs ,id=250ua 1.0 3.0 v gate leakage current i gss v ds =0v,v gs =20v 100 na v ds =40v,v gs =0v 1 zero gate voltage drain current i dss v ds =40v,v gs =0v t j =55 5 ua drainsource on resistance r ds(on) v gs =10v,i d =25a v gs =5.0v,i d =16a 45 78 50 85 m forward transconductance gfs v ds =10v,i d =8a 8 s diode forward voltage v sd i s =16a,v gs =0v 1.2 v dynamic total gate charge q g 16.5 gatesource charge q gs 2.8 gatedrain charge q gd v ds =15v,v ds =100v i d =3.5a 4.5 nc input capacitance c iss 700 output capacitance c oss 129 reverse transfercapacitance c rss v ds =15v,vgs=0v f=1mhz 75 pf 25 turnon time t d(on) tr 26 70 turnoff time t d(off) tf v dd =15v,r l =15 r gen =10v,r g =6 i d -1.0a 50 ns
STP3052D p channel enhancement mode mosfet 25.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2009, stanson corp. STP3052D 2009. v1 typical characterictics
STP3052D p channel enhancement mode mosfet 25.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2009, stanson corp. STP3052D 2009. v1 typical characterictics
STP3052D p channel enhancement mode mosfet 25.0a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com copyright ? 2009, stanson corp. STP3052D 2009. v1 to-252-2l package outline
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